1. Field of the Invention
The present invention relates to chemical mechanical polishing (CMP) techniques and related wafer cleaning and, more particularly, to improved CMP operations.
2. Description of the Related Art
In the fabrication of semiconductor devices, there is a need to perform chemical mechanical polishing (CMP) operations and wafer cleaning. Typically, integrated circuit devices are in the form of multi-level structures. At the substrate level, transistor devices having diffusion regions are formed. In subsequent levels, interconnect metallization lines are patterned and electrically connected to the transistor devices to define the desired functional device. As is well known, patterned conductive layers are insulated from other conductive layers by dielectric materials, such as silicon dioxide. As more metallization levels and associated dielectric layers are formed, the need to planarize the dielectric material grows. Without planarization, fabrication of further metallization layers becomes substantially more difficult due to the higher variations in the surface topography. In other applications, metallization line patterns are formed in the dielectric material, and then, metal CMP operations are performed to remove excess metallization. After any such CMP operation, it is necessary that the planarized wafer be cleaned to remove particulates and contaminants.
FIG. 1 shows a schematic diagram of a chemical mechanical polishing (CMP) system 14, a wafer cleaning system 16, and post-CMP processing 18. After a semiconductor wafer 12 undergoes a CMP operation in the CMP system 14, the semiconductor wafer 12 is cleaned in a wafer cleaning system 16. The semiconductor wafer 12 then proceeds to post-CMP processing 18, where the wafer may undergo one of several different fabrication operations, including additional deposition of layers, sputtering, photolithography, and associated etching.
A CMP system 14 typically includes system components for handling and polishing the surface of the wafer 12. Such components can be, for example, an orbital polishing pad, or a linear belt polishing pad. The pad itself is typically made of a polyurethane material. In operation, the belt pad is put in motion and then a slurry material is applied and spread over the surface of the belt pad. Once the belt pad having slurry on it is moving at a desired rate, the wafer is lowered onto the surface of the belt pad. In this manner, wafer surface that is desired to be planarized is substantially smoothed, much like sandpaper may be used to sand wood. The wafer is then sent to be cleaned in the wafer cleaning system 16.
It is important to clean a semiconductor chip after a semiconductor wafer 12 has undergone a CMP operation in a chemical mechanical polishing (CMP) system 14 because particles, particulates and other residues remain on the surface of the semiconductor wafer 12 after the CMP operation. These residues may cause damage to the semiconductor wafer 12 in further post-CMP operations. The residues may, for example, scratch the surface of the wafer or cause inappropriate interactions between conductive features. Moreover, several identical semiconductor chip dies are produced from one semiconductor wafer 12. One unwanted residual particle on the surface of the wafer during post-CMP processing can scratch substantially all of the wafer surface, thereby ruining the dies that could have been produced from that semiconductor wafer 12. Such a mishaps in the cleaning operation may be very costly.
Better cleaning of the wafer can be achieved in the wafer cleaning system 16 by improving the processes used in the CMP system 14 before the wafer even gets to the wafer cleaning system 16. The CMP system 14 can be improved for the next wafer by conditioning the surface of the belt pad. Pad conditioning is generally performed to remove excess slurry and residue build-up from the clogged belt pad. As more wafers are polished, the belt pad will collect more residue build-up which can make efficient CMP operations difficult. One well-known method of conditioning the belt pad is to rub the belt pad with a conditioning disk. The conditioning disk typically has a nickel-plated diamond grid or a nylon brush over its surface. The diamond grid is typically used to condition belt pads having a hard surface. In contrast, the nylon brush is typically used to condition belt pads having a softer surface. The conditioning of the belt pad may be done in-situ, where the belt pad is conditioned while the belt pad is polishing the wafer, or ex-situ, where the belt pad is conditioned when the belt pad is not polishing a wafer.
While conditioning disks remove slurry and residue, they inevitably remove some of the belt pad surface. Of course, removal of the belt pad surface exposes a fresh layer of the belt pad, thus increasing the polishing rate during CMP. Unfortunately, removal of the belt pad surface using conventional conditioning methods causes the belt pad to wear out quickly, thereby driving up the cost of running the CMP system 14. On the other hand, if the belt pad is under-conditioned, the life of the belt pad may increase because less of the belt pad is removed. However, residual clogging materials will be left on the belt pad surface. Thus, the belt pad will generally not polish at an efficient rate and the CMP itself will not be of a very high quality.
For the aforementioned reasons, techniques for conditioning the belt pad are an important part of the semiconductor chip fabrication process. There is therefore a need for improved methods of conditioning the belt pad.